From 0a35d762ec340474f4acca7b503129e9b5179084 Mon Sep 17 00:00:00 2001 From: Astoria Date: Mon, 3 Apr 2023 20:41:22 -0500 Subject: [PATCH] More Language! --- src/main/resources/lang/afloydwiremod/en_US.lang | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/main/resources/lang/afloydwiremod/en_US.lang b/src/main/resources/lang/afloydwiremod/en_US.lang index 380b9e0..bdcc36a 100644 --- a/src/main/resources/lang/afloydwiremod/en_US.lang +++ b/src/main/resources/lang/afloydwiremod/en_US.lang @@ -5,4 +5,6 @@ item.afloydwiremod.toolWiring.desc=Used to connect outputs to inputs. tile.afloydwiremod.chipTile.name=Chip tile.afloydwiremod.chipTile.desc=Used to preform mathematical calculations. tile.afloydwiremod.linkTile.name=Redstone Link -tile.afloydwiremod.linkTile.desc=Used to interface chips with redstone devices. \ No newline at end of file +tile.afloydwiremod.linkTile.desc=Used to interface chips with redstone devices. +tile.afloydwiremod.displayTile.name=Display +tile.afloydwiremod.displayTile.desc=Used to output values from wires. \ No newline at end of file