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afloydwiremod
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Astoria 2 years ago
parent c0e198d8c5
commit 0a35d762ec
1 changed files with 3 additions and 1 deletions
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src/main/resources/lang/afloydwiremod/en_US.lang
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@ -5,4 +5,6 @@ item.afloydwiremod.toolWiring.desc=Used to connect outputs to inputs.
tile.afloydwiremod.chipTile.name=Chip tile.afloydwiremod.chipTile.name=Chip
tile.afloydwiremod.chipTile.desc=Used to preform mathematical calculations. tile.afloydwiremod.chipTile.desc=Used to preform mathematical calculations.
tile.afloydwiremod.linkTile.name=Redstone Link tile.afloydwiremod.linkTile.name=Redstone Link
tile.afloydwiremod.linkTile.desc=Used to interface chips with redstone devices. tile.afloydwiremod.linkTile.desc=Used to interface chips with redstone devices.
tile.afloydwiremod.displayTile.name=Display
tile.afloydwiremod.displayTile.desc=Used to output values from wires.
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